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datasheet version 1.3 aug , 20 15 magnachip c onfidential document. d o not distribute . map 8802 C critical conduction mode pfc controller ordering information part number top marking ambient temperature range package pb - free map 8802 map 8802 - 40 c ~ 12 5 c 8 - lead small outline package (sop - 8 pin) yes m ap 8802 crm pfc controller general description the MAP8802 is an active power factor correction ( pfc) controller for boost pfc applications that operates in critical conduction mode ( crm) in crm operation, the on time is constant during the ac line cycle and the off time varies with the instantaneous input voltage. the voltage mode crm pfc controller does not need the input voltage sense line. it can reduce power loss. crm operation is an ideal choice for medium power (100w~300w) pfc boost stages with the zero current switching of dcm operation. MAP8802 provides protection functions such as overvoltage protection, under - voltage protection, open feedback loop protection, overcurrent protection, pfc output/bypass diode short protection, zcd winding short protection. MAP8802 is a available in an sop - 8 pin package. the device operates over the - 40 c ~ 12 5 c temperature . ranges . features ? near unity power factor ? no input voltage sensing requirement ? latching pwm for cycle - by - cycle on time control (voltage mode) ? trans - conductance amplifier ? high precision voltage reference (1.6% over the temperature range) ? very low startup current consumption (35ua) ? low t ypical operating current consumption ? source 500ma / sink 800ma totem pole gate driver ? under - voltage lockout with hysteresis ? pin - to - pin compatible with industry standards ? this is a pb - free and halide - free device ? zcd short protection applications ? ac adapter ? ballast, solid state lighting ? lcd tv, monitor ? pdp tv ? smps protection function ? boost diode short protection ? bypass diode short protection. ? zcd winding short protection ? overvoltage protection ? overcurrent protection ? undervoltage protection ? open/floating feedback protection
datasheet version 1.3 aug , 20 15 magnachip c onfidential document. d o not distribute . map 8802 C critical conduction mode pfc controller pin configuration figure 1. pin configurat ion (top view) pin description pin no name description 1 fb the fb pin is the inverting input of the internal error amplifier. the output voltage of the boost pfc converter should be resistively divided to 2.5v. 2 c t the ct pin sources a current to charge an external timing capacitor. the circuit controls the power switch on time by comparing the ct voltage to an internal voltage derived from v control 3 c on t rol the control pin is the output of the internal error ampl ifier. a compensation network is connected between the control pin and ground to set the loop bandwidth. 4 cs the cs pin limits the cycle - by - cycle current through the power switch. when the cs voltage exceeds v ilim , the drive turns off. the sense resistor that connects to the cs pin programs the maximum switch current. 5 zcd the zcd pin is the zero current detection pin. when the voltage of this pin goes lower tha n 0.7 , the mosfet is turned on . 6 gnd the gnd pin is signal ground. 7 drv gate driver output for external boost mosfet 8 v cc t h e v cc pin is the positive supply of the controller. the controller is enabled when v cc exceeds v cc(on) and is disabled when v cc decreases to less than v cc(off). c s 1 c o n t r o l 2 c t 3 4 z c d v c c 8 7 f b 6 g n d 5 d r v m a p 8 8 0 2
datasheet version 1.3 aug , 20 15 magnachip c onfidential document. d o not distribute . map 8802 C critical conduction mode pfc controller functional block diagra m application diagram f ig ur e 2. block diagram f ig ur e 3. typical application 3 f b c o n t r o l c t o u t g n d u v l o 8 7 6 5 s q r q s q r q s q r q 1 2 4 c s c t g e n w o f f s e t o u t l e b v c c o u t s q r q p o k p o k v d d v r e f o f f t i m e r s q r q v c c e r r o r d e t e c t i o n r e s e t v d s p g m u v p o v p z c d c l a m p z c d ( t r i g ) z c d ( a r m ) r e s e t v e a h c l a m p p w m o c p v i l i m o u t v d d t i s s 9 . 5 v 1 2 v f r e q . l i m i t v c c v c c a c d c o u t p u t v c c o u t c s f b g n d v c c z c d c t c o n t r o l m a p 8 8 0 2
datasheet version 1.3 aug , 20 15 magnachip c onfidential document. d o not distribute . map 8802 C critical conduction mode pfc controller absolute maximum ratings stresses exceeding maximum ratings may damage the device. functional operation above the recommended operating conditions is not guaranteed. extended exposure to stresses above the recommended operating conditions may affect device reliability. t h e absolute maximum ratings are stress ratings only. symbol parameter value un it v fb fb voltage - 0.3 to 9 v i fb fb current 10 ma v ct ct voltage - 0.3 to 9 v i ct ct current 10 ma v control control voltage - 0.3 to vcontrol(clamp) v i control control current - 2 to 10 ma v c s cs voltage - 0.3 to 20 v i c s cs current 10 ma v zcd zcd voltage - 0.3 to vzcd(clamp) v i zcd zcd current 10 ma v out out voltage - 0.3 to v cc v i out(sink) out sink current 800 ma i out(source) out source current 500 ma v cc v cc supply voltage - 0.3 to 20 v i cc i cc supply current 20 ma p d power dissipation(t a = 70 c ) 785 mw r ja thermal resistance junction - to - ambient 101.9 c /w t j operating junction temperature range - 40 to 125 c t j(max) maximum junction temperature 150 c t stg storage temperature range - 65 to 150 c t l lead temperature (soldering, 10s) 300 c esd hbm on all pins (1 ) 5,000 v mm on all pins ( 1 ) 400 notes: 1. human body model(hbm) per jesd22 - a for all pins / machine model(mm) per jesd22 - a 115 for all pins.
datasheet version 1.3 aug , 20 15 magnachip c onfidential document. d o not distribute . map 8802 C critical conduction mode pfc controller electrical characteristics unless noted, v cc = 13v , and typical values are tested at t a = 25 c symbol characteristic conditions min typ max. unit startup and supply circuits v cc(on) startup voltage threshold v cc increasing 11 12 13 v v cc(off) minimum operating voltage v cc decreasing 8.8 9.5 10.2 v h uvlo supply voltage hysteresis - 2.5 - v i cc(startup) startup current consumption 0v < v cc < v cc(on) - 200mv - 24 35 a i cc1 no load switching current consumption c out = open, 70khz switching, v cs = 0 v - 1.4 1.7 ma i cc2 switching current consumption c out = 1nf , 70khz switching, v cs = 0v - 2. 4 2. 9 ma i cc(fault) fault condition current consumption no switching, v fb = 0v - 1.2 1.45 ma error amplifier section v ref voltage reference t a = 25c 2.475 2.500 2.525 v ref 1 voltage reference line regulation v cc(on) + 200mv < v cc < 20v - 10 - 10 mv ref2 temperature stability of v ref ( 4 ) - 1.6 - 1.6 % i ea (sink/source) i ea(sink)ovp error amplifier current capability v fb = v ref fb = 1.08 * v ref or v ref + 0.2v 6 20 10 50 20 80 ua g m trans conductance v fb = v ref fb > v ref + 0 .2 v , v fb < v ref - 0.2 v 105 - 125 250 145 - mho r fb feedback pin internal pull down resistor v fb = v uvp to v ref 2 4.6 10 m i fb feedback bias current v fb = 2.5v 0.25 0.54 1.25 a i control control bias current v fb = 0v - 1 - 1 a v eah maximum control voltage i control(pull up) = 10ua, v fb > v ref ( v fb = v ref + 0.1v) 5 5.5 6 v ct (offset) minimum control voltage to generate output pulses v control = decreasing until v out is low, v ct = 0v 0.37 0.65 0.88 v v ea(diff) control voltage range v eah C (offset) 4.5 4.9 5.3 v current sense section v ilim current sense voltage threshold 0.45 0.5 0.55 v t leb leading edge blanking duration v cs = 0v, v out = 90% to 10% 100 190 350 ns t cs overcurrent detection propagation delay dv/dt = 10v/us v cs = v ilim to v out = 10% 40 100 170 ns i cs current sense bias current v cs = 2v - 1 - 1 a
datasheet version 1.3 aug , 20 15 magnachip c onfidential document. d o not distribute . map 8802 C critical conduction mode pfc controller electrical characteristics unless noted, v cc = 13v , and typical values are tested at t a = 25 c symbol characteristic conditions min typ max. unit ramp control section v ct(max) ct peak voltage v c ontrol = open 4. 5 75 4.93 5. 0 2 5 v i charge ont ime capacitor charge current ( 4 ) v c ontrol = open v c t = 0v to v ct(max) 235 275 297 a t ct (discharge) ct capacitor discharge duration ( 4 ) v c ontrol = open v c t =v ct(max) C 100mv to 500mv - 50 150 ns t pwm pwm propagation delay ( 4 ) dv/dt = 30v/us v ct = v control C ct (offset) to v out = 10% - 130 220 ns max frequency limit section f max maximum switching frequency - 3 00 400 khz zero current detecton v zcd(arm) zcd arming threshold v zcd = increasing 1.25 1.4 1.55 v v zcd(trig) zcd triggering threshold v zcd = decreasing 0.6 0.7 0.83 v v zcd(hys) zcd hysteresis - 700 - mv i zcd zcd bias current v zcd = 5v - 2 - +2 a v cl(pos) positive clamp voltage i zcd = 3ma 4.5 6 7.5 v v cl(neg) negative clamp voltage i zcd = - 2ma - 0.9 - 0.7 - 0.5 v t zcd zcd propagation delay v zcd = 2v to 0v ramp, dv/dt = 20v/us v zcd = v zcd(trig) to v out = 90% - 100 170 ns t sync minimum zcd pulse width (4 ) - 70 - ns t start maximum off time in absence of zcd transition falling v out = 10% to rising v out = 90% 75 165 300 s output section r oh r ol output resistance (4) i source = 100ma i sink = 100ma - - 12 6 20 13 t rise rise time 10% to 90% - 35 80 ns t fall fall time 90% to 10% - 25 70 ns v drv ( start) output low voltage v cc =v cc(on) C 200 mv, i sink = 10ma - - 0.2 v protection v ovp overvoltage detect threshold v fb = increasing 10 4 106 108 % v ovp(hys) overvoltage hysteresis 20 50 9 0 m v t ovp overvoltage detect threshold propagation delay (4) v fb = 2v to 3v ramp, dv/dt = 1v/us v fb = v ovp to v out = 10% - 500 800 ns v uvp undervoltage detect threshold v fb = decreasing 0.23 0.31 0.4 v t uvp undervoltage detect threshold propagation delay (4) v fb = 1v to 0v ramp, dv/dt = 10v/us v fb = v uvp to v out = 10 % 100 200 300 ns v dsp diode short protection (5 ) - 1.6 - v notes: 2. this parameters are not production tested: guaranteed by design correlation. 3. this parameter is influenced by board pattern. so we are recommended that connect to bid at mosfet drain current path.
datasheet version 1.3 aug , 20 15 magnachip c onfidential document. d o not distribute . map 8802 C critical conduction mode pfc controller ty pical operating characteristics unless noted, v cc = 13v , and typical values are tested at t a = 25 c f igure 4 . reference voltage vs. junction temperature f igure 5 . startup current consumption vs. junction temperature f igure 5 . startup current consumption vs. junction temperature f igure 4 . reference voltage vs. f igure 6 . maximum off time in absence of zcd transition vs. junction temperature f igure 7 . ct peak voltage vs. junction temperature f igure 5 . startup current consumption vs. junction temperature f igure 4 . reference voltage vs. f igure 9 . overvoltage low detect threshold vs. junction temperature f igure 5 . startup current consumption vs. junction temperature f igure 4 . reference voltage vs. f igure 8 . overvoltage high detect threshold vs. junction temperature -40 -20 0 25 50 85 100 125 60 80 100 120 140 160 180 200 t start , maximum off time[us] tj, junction temperature[ -40 -20 0 25 50 85 100 125 2.48 2.49 2.50 2.51 2.52 v ref reference voltage[v] tj, junction temperature[ -40 -20 0 25 50 85 100 125 20 22 24 26 28 30 32 34 icc startup [ma] tj, junction temperature[ -40 -20 0 25 50 85 100 125 101 102 103 104 105 106 107 ovp_l , overvoltage detect threshold[%] tj, junction temperature[ -40 -20 0 25 50 85 100 125 104.0 104.5 105.0 105.5 106.0 106.5 107.0 107.5 108.0 ovp_h , overvoltage detect threshold[%] tj, junction temperature[ -40 -20 0 25 50 85 100 125 4.6 4.7 4.8 4.9 5.0 v ct(max) , ct peak voltage[v] tj, junction temperature[
datasheet version 1.3 aug , 20 15 magnachip c onfidential document. d o not distribute . map 8802 C critical conduction mode pfc controller f igure 10 . undervoltage detect threshold vs. junction temperature f igure 11 . current sense voltage threshold vs. junction temperature f igure 5 . startup current consumption vs. junction temperature f igure 4 . reference voltage vs. f igure 12 . error amplifier sink current vs. junction temperature f igure 13. error amplifier source current vs. junction temperature f igure 5 . startup current consumption vs. junction temperature f igure 4 . reference voltage vs. f igure 15 . feedback pin internal pull - down resistor vs. junction temperature f igure 5 . startup current consumption vs. junction temperature f igure 4 . reference voltage vs. f igure 14 . error amplifier transconductance vs. junction temperature -40 -20 0 25 50 85 100 125 80 90 100 110 120 130 140 150 gm, error amplifier transconductance [umho] tj, junction temperature[ -40 -20 0 25 50 85 100 125 -20 -18 -16 -14 -12 -10 -8 -6 iea source [ua] tj, junction temperature[ -40 -20 0 25 50 85 100 125 0.46 0.48 0.50 0.52 0.54 v ili m [v] , current sense voltage tj, junction temperature[ -40 -20 0 25 50 85 100 125 0.20 0.22 0.24 0.26 0.28 0.30 0.32 0.34 0.36 0.38 0.40 v uvp , undervoltage detect threshold[v] tj, junction temperature[ -40 -20 0 25 50 85 100 125 6 8 10 12 14 16 18 20 iea sink [ua] tj, junction temperature[ -40 -20 0 25 50 85 100 125 2 3 4 5 6 7 8 9 10 rfb[mohm] tj, junction temperature[
datasheet version 1.3 aug , 20 15 magnachip c onfidential document. d o not distribute . map 8802 C critical conduction mode pfc controller f igure 17 . feedback voltage vs. vcc voltage f igure 16 . error amplifier output current vs. feedback voltage 0.0 0.5 1.0 1.5 2.0 2.5 3.0 -250 -200 -150 -100 -50 0 50 100 iea, error amplifier output current[ua] vfb, feedback voltage[v] 12 13 14 15 16 17 18 19 20 2.490 2.492 2.494 2.496 2.498 2.500 2.502 2.504 2.506 2.508 2.510 vfb, feedback voltage[v] vcc[v]
datasheet version 1.3 aug , 20 15 magnachip c onfidential document. d o not distribute . map 8802 C critical conduction mode pfc controller application information 1. start up generally, if the v cc voltage goes to v cc(on) , the ic s internal blocks are enabled. the low startup current consumption (<35ua) enables minimized standby power dissipation. the v cc voltage should be higher than 9.5v under normal conditions after start - up. figure 1 8 . startup circuit 2. fb block scaled - down voltage from the output is the input for the fb pin. the used trans - conductance amplifier is good for the implementation of ovp and disables functions. the output current of the amplifier varies according to the voltage difference. the map 8802 features comprehensive protection against open feedback loop conditions by includ ing ovp, uvp, and fbp. figure 19 illustrates three conditions in which the feedback loop is open. figure 19 . open feedback loop protection the uvp comparator detects an uvp fault, the drive and error amplifier are disabled. the ovp comparator detects an ovp fault and the drive is disabled. the fb is floating. the internal pull down resistor r fb pulls down the fb voltage below v uvp. the uvp comparator detects an uvp fault, the drive and error amplifier are disabled. 3. ct block the map 8802 controls the on time with the capacitor connected to the ct pin. a current source charges the ct capacitor to a voltage derived from the control pin voltage ( v ct(off) ). when v ct(off) is reached , the drive turns off.(figure 2 0 . turn on time regulation) the ct capacitor is sized to ensure that the required on time is reached at maximum output power and the minimum input voltage condition. the ct pin discharges the external timing capacitor at the end of the on time . figure 2 0 . turn on time regulation 4. control block the scaled output is compared with the internal reference voltage and sinking or sourcing current is generated from the control pin by a trans - conductance amplifier. the error amplifier output is compar ed with the saw - tooth waveform created at the ct. when load is heavy, output voltage decreases, scaled output decreases, control voltage increases to compensate low output. the maximum of v control is limited to 5.5v and switching stops when ct (offset) is lower than 0.65v. the pre - converter is compensated to ensure stability over the input voltage and output power range. to compensate the loop, a compensation network is connected between the control and ground pins. t o ensure high pf, the bandwidth of t he loop is set below 20hz. compensation network is selected for this design to increase the phase margin. t he compensati on network is shown in figure 2 1 . u v l o 8 v c c 9 . 5 v 1 2 v 1 2 v 9 . 5 v v c c 3 f b c o n t r o l 1 p o k v r e f e r r o r d e t e c t i o n g m u v p o v p v e a h c l a m p t i s s 2 o u t p w m c t ( o f f s e t ) 3 c o n t r o l c t t o n v c o n t r o l - c t ( o f f s e t ) o u t t o n ( m a x ) t p w m c t ( o f f s e t ) v e a h i c h a r g e c t s l o p e = p w m b l o c k v c c
datasheet version 1.3 aug , 20 15 magnachip c onfidential document. d o not distribute . map 8802 C critical conduction mode pfc controller figure 2 1 . compensation network for the transconductance error amplifier side, gain changes based on differential input. when the error is large, gain is large to make the output dip or peak to suppress quickly. when the error is small, low gain is used to improve power factor performance . figure 2 2 . gain change 5. error amplifier block the error amplifier block consists of a ovp comparator, a transconductance amplifier and a uvp comparator. this enables the fb pin to be used for sensing overvoltage or under voltage conditions independently of the error amplifier. the map 8802 regulates the boost output voltage using an internal error amplifier ( e/a). the negative terminal of the ea is pinned out to fb, the positive terminal is connected to a 2.5v 1.6% reference, and the ea output is pinned out to control. a feature of using a transconductance type amplifier is that the fb pin voltage is only determined by the resistor divider network connected to the output voltage, not the operation of the amplifier. (see figure2 1 ) 6. overshoot - less startup feedback control speed of pfc is quite slow. due to the slow response, there is a gap between output voltage and feedback control. that is why over - voltage protection (ovp) is critical at the pfc controller and voltage dip caused by fast load changes from light to heavy is diminished by a bulk capacitor. ovp is easily triggered at startup phase. operation on and off by ovp at startup may cause audible noise and can increase voltage stress at startup, which is normally higher than in normal operation. this operation is better when start up time is very long. however, too long startup time enlarges the output voltage building time at light load. map 8802 has overshoot - less control at startup. during startup, the feedback loop is controlled by an internal proportional gain controller and when the output voltage reaches the rated value, it switches to an external compensator after a transition time . in short, an internal proportional gain controller eliminates overshoot at startup a nd an external conventional compensator takes over successfully afterward. 7. cs block the mosfet current is sensed using an external sensing resistor for over - current protection. if the cs pin voltage is higher than 0.5v, the over - current protection compar ator generates a protection signal. if the boost diode is shorted, the very high current flows through the mosfet and then the mosfet is damaged. map 8802 has a comparator to generate a protection signal if the cs pin voltage is higher than 1 .6 v. at this time, drv signal to be off and that is not start operation before vcc is up to uvlo voltage. and t o more stable operation of dsp, we are recommend that connect to bid at mosfet drain current path. figure 2 3 . diode s hort protection 1 v o u t c o n t r o l f b 3 v r e f g m e / a v c o n t r o l c o m p e n s a t i o n n e t w o r k f b i c o n t r o l f b : 2 . 5 v 2 . 4 v 2 . 6 v g m : 1 2 5 u m h o 2 5 0 u m h o 2 5 0 u m h o 4 v d s p o c p v i l i m c s
datasheet version 1.3 aug , 20 15 magnachip c onfidential document. d o not distribute . map 8802 C critical conduction mode pfc controller 8. zcd block the zero current detector ( zcd) generates the turn - on signal of the mosfet when the boost inductor current reaches zero using auxiliary winding coupled to the boost inductor. to activate the zcd detector of the map 8802 , the zcd turns ratio is sized such that at least v zcd pin during all ope rating conditions.(see figure 2 4 ) the zcd pin is protected internally by two clam ps, positive clamp voltage is 6.0 v and negative clamp volt age is - 0.7 v. when the auxiliary voltage is higher than 10v, current is sinked through a resistor from the auxiliary winding to the zcd pin. figure 2 4 . realistic operation using a zcd winding 9. gate output driver the map 8802 includes a powerful output driver capable of sourcing 500ma and sinking 800ma. this enables the controller to drive power mosfets efficiently for medium power ( 350w) applications. additionally, the driver stage provides both passive and active pull down clamps.(fig ure 2 5 .) the clamps are active when v cc is off and force the driver output to a voltage less than the turn on threshold voltage of a power mosfet. figure 2 5 . output driver stage and pull down clamps 10. under - voltage protection when the input voltage is applied to the pfc stage, v out is forced to equate to the peak of the line voltage. the map 8802 detects an under - voltage fault if v out is unusually low, such that v fb is less than v uvp . during an uvp fault, the drive and error amplifier are disabled. the uvp feature protects the application if there is a disconnection in the power path to c bulk or if r out1 is disconnected. 11. over - voltage protection the low bandwidth of the feedback network causes active pfc stages to react to changes in output load or input voltages slowly. consequently, there is a risk of overshoots during transient conditions. it is critical that overvoltage protection ( ovp) preven ts the output voltage from exceeding the ratings of the pfc stage components. the map 8802 detects excessive v out voltage and disables the driver until v out decreases. ovp ensures that vout is within the pfc stage component ratings. a comparator connected to the fb pin provides the ovp protection . t o n ( m a x ) r z c d d e l a y t o n t d i o d e t o f f t s w v z c d ( a r m ) v z c d ( t r i g ) v c l ( p o s ) v z c d v z c d ( w i n d ) , o n v z c d ( w i n d ) , o f f v z c d ( w i n d ) o u t t z i l ( p e a k ) i l ( n e g ) v d d u v l o v c c u v l o o u t i n o u t
datasheet version 1.3 aug , 20 15 magnachip c onfidential document. d o not distribute . map 8802 C critical conduction mode pfc controller 12. zcd short protection max frequency limit this function prevents the operation of the ccm and the burning of wires when the aux short,(see figure 26 ) the initial operation starts with ccm mode because the output voltage is lower than input. the ccm operation let the switching frequency increase until output voltage approaches the setting voltage. at this moment , the frequency is over 2mhz. map 8802 is designed to be operated in critical conduction mode ( crm). however, when aux short occurs, ic cannot operate with crm mode because the zcd voltage cannot be detected. at this moment, the operation mode is ccm and frequency is over 2mhz. therefore, maxi mum frequency limit is required because the high frequency is occurred the burning of wire. figure 2 6 . aux wire short off timer protection if zcd noise is not existed, map 8802 is operating as off timer ( t - start timer) because zcd signal is be absent. but it is can be occurred audible noise because the period is about 150us.(about 6khz) to prevent audible noise, map 8802 detects the cycle of tstart timer. if tstart timer reached 16 cycle, map 8802 entered auto - restart pro tection mode. figure 2 7 . zcd off timer protection v a u x 1 7 6 8 5 3 m p 8 8 0 2 c t f b v c c o u t g n d z c d c s c o n t r o l 4 2 s h o r t switching current t start _ timer v cc t start timer : 150 us start - up zcd short point 150 us t start timer : 16 cycle v cc ( on ) v cc ( off ) t start timer : 150 us t on pulse width : 1 u sec .
datasheet version 1.3 aug , 20 15 magnachip c onfidential document. d o not distribute . map 8802 C critical conduction mode pfc controller typical application circuit 1. demonstration board specification. the electronic design tool allows the user to easily determine most of the system parameters of a boost pre?converter. the demonstration board accepts a universal ac line - input voltage (85vac~26 5 vac), and produces an output voltage of 400 vdc for loads up to 0.5a (po = 200w). in demonstration board, the bypa ss diode (dp102) & rc resistor of cs block filter is optional. the detail demonstration design information described in our application note. 2. operating information. 3. transformer information. 3.1 winding specification pin wire turns np 4,5 2,3 0. 1 * 60 49 insulation tape 0.05mm 3 naux 7 9 0. 5 *1 6 insulation tape 0.05mm 3 3.2 inductance & core pin spec. remark inductance 3,4 1,2 200 ? h 5 % 100 khz, 1v core - eer3124 samhwa(pl - 7) 4. application schematic input range output power output voltage 85vac ~ 265vac 200w 400v(0.5a) figure 28. application schematic 2 5 0 v , 5 a a c i n p u t z n r 1 0 1 2 2 0 n f 2 3 m h 6 8 0 n f 5 d 1 5 6 0 0 v , 1 5 a 2 2 k 3 0 0 , 2 w u f 4 0 0 7 0 . 6 8 u f 4 . 3 m 2 0 k 6 0 0 v 8 a v a u x 8 2 k 1 0 0 u f , 4 5 0 v 1 2 n f 1 n 4 7 4 6 a 4 7 u f , 5 0 v d c o u t p u t 6 8 k , 2 w 2 . 2 u f 1 7 6 8 5 3 1 n f m a p 8 8 0 2 c t f b v c c o u t g n d z c d c s c o n t r o l 4 m d f 1 8 n 5 0 2 0 . 0 5 , 5 w 1 0 k 1 0 0 1 n 4 1 4 8 0 . 6 8 u f , 6 3 0 v d c 4 . 3 m 4 . 3 m 4 . 7 n . c 1 m - j 0 . 1 u f , 5 0 v 4 7 0 p f 1 n 4 1 4 8 f p 1 0 1 1 0 d 4 7 1 r p 1 0 1 c p 1 0 1 l f 1 0 1 c p 1 0 2 t h 1 0 1 b d p 1 0 1 c p 1 0 3 r p 1 0 4 c p 1 0 4 c p 1 0 5 r p 1 0 5 z d p 1 0 1 d p 1 0 1 c p 1 0 6 r p 1 0 6 r p 1 0 8 c p 1 0 9 c p 1 0 8 r p 1 1 1 r p 1 0 9 r p 1 1 0 d p 1 0 4 q p 1 0 1 d p 1 0 5 c p 1 1 0 r p 1 1 2 c p 1 1 1 r p 1 1 6 r p 1 1 3 r p 1 1 4 r p 1 1 5 c p 1 1 2 d p 1 0 3 e e r 3 1 2 4 l p 1 0 1 d p 1 0 2 r p 1 0 2 1 m - j r p 1 0 3 1 m - j n . c l f 1 0 2 r p 1 0 7 3 0 0 , 2 w 1 n f c p 1 0 7 z d p 1 0 2 i c p 1 0 1 1 0 0 u f , 4 5 0 v c p 1 1 3 6 0 0 v 3 a r p 1 1 7 4 . 7 2 0 0 u h b d 1 0 1
datasheet version 1.3 aug , 20 15 magnachip c onfidential document. d o not distribute . map 8802 C critical conduction mode pfc controller bom list map 8802 200w wide - range application circuit components list part value note part value note ic mosfet icp101 map 8802 magnachip (8 - sop) qp10 2 mdf18n50 magnachip (to - 220) ntc zener diode th101 5d - 15 zdp101 zdp102 zdp103 1n4746 n.c 1n4746 fairchild resistor capacitor r p 101 r p 102 r p 103 1m - j 1/ 8 w (smd - 2012 ) c p101 220nf/275vac x - capacitor rp10 4 68 k - j 2 w cp102 680nf/275v ac x - capacitor rp10 5 22k - j 1/4w (smd3216) c p103 680nf/ 630vdc box capacitor rp10 6 rp107 300 - j 2 w cp10 4 47u f / 50 v electrolytic capacitor rp10 8 2 0k - j 1/ 8 w (smd - 2012 ) cp10 5 0.1u f/ 5 0v chip capacitor rp10 9 47 - j 1/ 8 w (smd - 2012 ) cp10 6 12n f/50v film capacitor rp1 10 4.7 - j 1/ 8 w (smd - 2012 ) cp10 7 1nf/50v chip capacitor rp11 1 10k - j 1/ 8 w (smd - 2012 ) cp108 0.68 uf/16v chip capacitor rp11 2 0.05 - j 5w cp109 2.2u f/ 16 v chip capacitor rp11 3 rp114 rp115 4.3m - f 1/ 8 w (smd - 2012 ) cp1 10 470p f/ 50 v chip capacitor rp116 82k - f 1/ 8 w (smd - 2012 ) cp 111 1n f/50v chip capacitor rp117 10 - j 1/8w (smd - 2012) cp112 cp113 120uf/450v electrolytic capacitor fuse f p 101 5.0al/250v diode varistor dp101 uf 4007(1000v 1a) vishay znr101 10d - 471 470v dp102 uf 5408(1000v 3a) vishay line filter dp10 3 fsu10b60 nihon inter lf101 lf102 23mh n.c wire0.7mm dp104 dp105 mmbd4148 fairchild bridge diode inductor bd p 101 gbj1506 diode lp101 200 uh eer3 124 connector cn101 cn102 yhw396 - 03v
datasheet version 1.3 aug , 20 15 magnachip c onfidential document. d o not distribute . map 8802 C critical conduction mode pfc controller physical dimensions disclaimer: the products are not designed for use in hostile environments, including, without limitation, aircraft, nuclear power generation, medical appliances, and devices or systems in which malfunction of any product can reasonably be expected to result in a personal injury. seller s customers using or selling seller s products for use in such applications do so at their own risk and agree to fully defend and indemnify seller. magnachip reserves the right to change the specifications and circuitry without notice at any time. magnachip does not consid er responsibility for use of any circuitry other than circuitry entirely included in a magnachip product. is a regis tered trademark o f magnachip semiconductor ltd.

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